H.264/AVC Video Compression

Encoders, Decoders and Subsystems

This IP cores family offers a set of efficient hardware encoders and decoders for H.264 video encoding. All cores are highly optimized custom hardware engines that operate autonomously without any software assistance, and stand-out for their small silicon area and low-power consumption. The cores are suitable for live-streaming applications with stringent latency requirements. Tens of customers, have used H.264 cores from CAST in a wide range of applications. The family includes:

  • H264-E-CFS: Low-power AVC/H.264 encoder with Compressed Frame Store, eliminating the need for external DRAM.
  • H264-E-BPF: Ultra-fast AVC/H.264 Baseline Profile encoder, supports UHD/4K on ASICs and high-end FPGAs.
  • H264-E-BPS: Low-power, compact AVC/H.264 Baseline Profile encoder.
  • H264-E-HIS: Intra-only, 10-bit capable AVC/H.264 encoder. Small size and low-power, it does not require external memory for frame buffering.
  • H264-D-BP: Low-power, compact AVC/H.264 Constrained Baseline Profile Decoder.
  • H264-LD-BP: Ultra-small AVC/H.264 decoder compatible with streams generated by our baseline profile encoders.

Compare video encoders and decoders in this H.264/AVC Product Family Brief PDF:

H.264/AVC Family Brief Thumbnail

The family of H.264/AVC cores is complemented by companion cores including:

  • H2642RTP: Hardware RTP stack for efficient H.264/NAL stream encapsulation, designed for high-performance streaming.
  • H264OIP-HDD: Integrates H.264 decompression and IP decapsulation, for rapid HD Video Over IP product development.
  • H264OIP-HDE: HD Encoder Subsystem for H.264 Video Over IP, integrates compression and IP encapsulation, processor-free operation.
  • RTP2H264: Hardware RTP stack for H.264 stream decapsulation, facilitates processor-less efficient video streaming.
  • MM2ST: An AHB/AXI4-Lite to AXI4-Stream Bridge. Enables the use of any H.264 core as a memory-mapped peripheral, with data-transfers controlled by an external DMA.
  • AXI4-SGDMA: An AXI4 Memory-Mapped to/from AXI4-Stream Scatter-Gather DMA. Enables the use of any H.264 core as a memory-mapped peripheral with an internal DMA.
  • UDP/IP-1G: Hardware UDP/IP stack enabling direct streaming over an IP network.

Related Content

Choosing the Right IP Cores for Low-Latency Video Streaming

A negligible delay from video capture to display—the “glass-to-glass” latency—is critical for many video streaming applications, from advanced driver assistant systems (ADAS) and unmanned vehicles to video conferencing and broadcasting.
Dec 16, 2016
H.264/AVC Product Family Brief
Products in Family

H264-D-BP

Low-Latency AVC/H.264 Baseline Profile Decoder

H264-E-BPF

Ultra-Fast AVC/H.264 Baseline Profile Encoder

H264-E-BPS

Low-Power AVC/H.264 Baseline Profile Encoder

H264-E-CFS

AVC/H.264 Video Encoder with Compressed Frame Store

H264-LD-BP

Low-Power AVC/H.264 Baseline Profile Decoder

H2642RTP

Hardware RTP Stack for H.264 Stream Encapsulation

H264OIP-HDD

H.264 Video Over IP – HD Decoder Subsystem

H264OIP-HDE

H.264 Video Over IP – HD Encoder Subsystem

RTP2Η264

Hardware RTP Stack for H.264 Stream Decapsulation

Let's talk about your project and our IP solutions

Request Info